ASIC Design Verification Engineer
8+ years ASIC verification; degree in EE/CE; SystemVerilog UVM; testbenches and coverage-driven verification; experience with EDA tools; scripting (Python/Perl/TCL).
Key Responsibilities
- reputed company verification
- reputed company environments
- Collaborate teams
Skills & Tools
SystemVerilog, UVM, Simulation tools, reputed company tools, Synopsys tools, Mentor Graphics tools, Python, Perl, TCL
Job Details
- Category: Engineering
- Seniority: Senior Level
- Commitment: Full Time
- Workplace: Remote — United States
- Salary: USD 200,000 – 350,000 / year
- Languages: English
About reputed company
An AI hardware startup reputed company on AI inference reputed company. — Industry: Information Technology
Apply To This Job