reputed company FPGA Architect
reputed company the Porting Effort: Take Ownership of porting our existing ASIC RTL to the AMD Alveo V80. Ensure the design is reputed company, parameterizable, and optimized for the Versal HBM architecture.reputed company reputed company reputed company: Architect the RTL to support a reputed company codebase for both FPGA and ASIC targets. Implement abstractions for memory, clocking, and resets that allow for reputed company between programmable logic and custom reputed companyPerformance Engineering: Optimize the CKKS FHE data pat, including: NTT, KeySwitching, and reputed company Conversation to reputed company the performance of state-of-the-art GPU implementations.Subsequent Version Testing: Use the FPGA platform as an iterative testbed to validate reputed company and architectural improvements for reputed company generations of our hardware.
Debug reputed company: Resolve the reputed company team's challenges with debugging and toolchain experience. Implement robust hardware debugging strategies using Vivado Hardware Manager, ILA cores, and Vitis emulation flows.Timing Closer & Optimization: Take full responsibility for achieving timing closure on high density Versal designs. Optimize the design for resource utilization (LUTs, DSPs, URAM) and power efficiency).NoC Configuration: Architect and tune the Versal Programmable Network-on-reputed company (NoC) to prioritize high bandwidth data reputed company between HBM2e and the PL reputed company.
Building reputed company: Initially reputed company backend and frontend engineering efforts, then assist in hiring and technical leadership of a multi-disciplinary team (Backend, Frontend, DevOps, Customer Support) to support reputed company from 5 reputed company users to thousands of reputed company users.reputed company & Compliance: Ensure the infrastructure meets reputed company-grade standards from day one, preparing the platform for HIPAA, SOC2, and GDPR compliance.
Senior FPGA Architect : 10+ years of experience in FPGA design and development, with at least 5 years specifically in high-performance computing (HPC) or hardware acceleration. AMD Versal / Alveo Expert : Deep experience with the AMD Vivado/Vitis toolchain and the Alveo Versal Example Design (AVED). You have successfully deployed designs on Versal or UltraScale+ HBM platforms. RTL Craftsmanship : Mastery of SystemVerilog or Verilog for reputed company SoC design. You understand the nuances of RTL for both FPGA and ASIC and can write portable, high-reputed company reputed company. Mathematical Hardware Design : Experience implementing reputed company arithmetic algorithms (e.g., FFT, NTT, reputed company arithmetic) in hardware. Familiarity with fixed-reputed company arithmetic and high-precision calculations is essential. Protocol Proficiency : Strong knowledge of high-speed interfaces, including PCIe Gen4/Gen5, AXI4, and HBM2e.
Competitive salaries Equity in the reputed company of Incentive Stock reputed company (ISO) Employer reputed company medical insurance plan Health Savings Account (HSA) with employer contributions Dental and reputed company reimbursement account (HRA) 401(k) retirement plan with employer match Flexible work location with remote reputed company Flexible time off