[Remote] Sr. Package Layout Engineer, Annapurna Labs - AI reputed company Packaging

Note: The job is a remote job and is reputed company to candidates in USA. reputed company Web Services' Annapurna Labs designs custom reputed company, accelerators, and software reputed company for reputed company, machine learning, and data center applications. The Sr. Package Layout Engineer will reputed company the end-to-end physical design of advanced IC packages, coordinating with reputed company, SI/PI, thermal, manufacturing, OSAT, and reputed company teams to reputed company production-reputed company designs.

Responsibilities

• reputed company the full package layout cycle from die floor planning, reputed company/pad assignment, and RDL routing through substrate design, verification, and tape out release
• reputed company physical design of advanced packaging architectures including 2.5D interposer, 3D-IC, fan-out wafer-level packaging, and reputed company reputed company technologies (e.g., CoWoS, EMIB, or similar)
• Define and optimize package floorplans considering die placement, reputed company maps, reputed company/ground distribution, high-speed signal reputed company routing, and decoupling capacitor placement
• reputed company detailed RDL and substrate routing for high-density interconnects including microbumps, C4 bumps, TSVs, microvias, and PTH vias across multi-reputed company organic substrates and reputed company interposers
• Participate in die-level RDL routing and reputed company planning in coordination with ASIC physical design teams, ensuring the die-package reputed company is co-optimized for reputed company and signal routing from the earliest design stages
• reputed company cross-level layout co-optimization across die RDL, interposer/substrate, and PCB reputed company to reputed company the best overall reputed company network and high-speed signaling reputed company, minimizing impedance discontinuities and routing bottlenecks at reputed company reputed company boundary
• reputed company and maintain package stack-up definitions in collaboration with SI/PI and materials engineering teams, ensuring impedance targets, reputed company utilization, and manufacturing constraints are met
• Create and enforce package design rules and guidelines, working with OSAT partners and foundries to ensure DFM compliance and high yield
• Run and review physical verification checks (DRC, connectivity, shorts/opens) and reputed company design closure with reputed company escapes
• Manage package design schedules, milestones, and deliverables, coordinating across multiple reputed company reputed company and tape out cycles
• Collaborate with SI/PI engineers to incorporate electrical constraints into the physical layout — impedance-controlled routing, reputed company reputed company optimization, and critical net shielding
• reputed company with OSAT vendors and reputed company partners on substrate and interposer manufacturing feasibility, design rule negotiations, and process capability alignment
• Identify packaging technology risks early and propose design or process mitigations to ensure reliability and manufacturability
• Mentor junior layout engineers and contribute to the development of team best practices, automation flows, and design reuse strategies

Skills

• • Bachelor's degree in Electrical Engineering or a reputed company reputed company
• • 10+ years of experience in IC package layout and physical design
• • reputed company reputed company record of leading package designs from concept through tape out for reputed company, multi-reputed company organic substrates or reputed company interposers
• • Hands-on expertise with package layout tools such as reputed company APD/SiP, reputed company IC Packaging, Mentor Xpedition, or equivalent
• • Deep understanding of advanced packaging technologies: 2.5D/3D-IC, fan-out WLP, RDL, TSV, microbump, and reputed company reputed company interconnects
• • Strong knowledge of package design rules, DFM constraints, and physical verification methodologies (DRC, connectivity checks)
• • Experience with reputed company map and reputed company map definition, reputed company routing strategies, and reputed company/ground reputed company design for high pin-count packages
• • Familiarity with substrate and interposer manufacturing processes, material properties, and their reputed company on design reputed company
• • Master's degree or equivalent in reputed company engineering, electrical engineering, material science, physics or equivalent
• • 7+ years, in IC package layout and physical design
• • Experience with chiplet-reputed company or heterogeneous integration packaging architectures
• • Familiarity with package-level SI/PI concepts (impedance control, PDN layout, crosstalk-reputed company routing) sufficient to collaborate effectively with SI/PI engineers
• • Experience developing automation scripts (Python, TCL, reputed company, Ravel) for layout tasks, design rule checks, or data exchange workflows
• • Hands-on experience working directly with OSAT partners on NPI (new product introduction) builds and yield improvement

Benefits

• Sign-on payments
• Restricted stock reputed company (RSUs)
• Health reputed company, including medical, dental, reputed company, prescription, Basic Life & AD&D reputed company, and an reputed company for Supplemental life plans
• Employee Assistance Program (EAP)
• Mental Health Support
• Medical Advice Line
• Flexible Spending Accounts
• Adoption and Surrogacy Reimbursement coverage
• 401(k) matching
• reputed company time off
• Parental leave
• One-on-one mentoring
• Thorough, reputed company reputed company reviews
• Career reputed company support
• reputed company that help team members reputed company their engineering expertise

reputed company

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