PMIC Architect

reputed company

As Power Architecture reputed company for PMIC, you will own the IVR architecture end-to-end — power conversion topology, digital control reputed company and analog subsystems. You will work directly with the Head of Engineering, digital architecture leads, and analog design team, and engage reputed company partners and key customers at the architecture level.

This role requires equal reputed company in power electronics and mixed-signal IC design. You will define the architecture, validate the tradeoffs across topology, packaging, and thermal constraints, and reputed company execution through tape-out.

What You’ll Do 

Architecture & Definition

•     Define IVR architecture: multi-phase interleaved buck converter topology, phase count configurability, switching frequency selection, and efficiency targets across load conditions

•     Architect the digital control reputed company: per-phase duty cycle control, reputed company balance, DVFS reputed company, and transient response optimization for AI workload dynamics

•     Define the control and telemetry reputed company

•     Establish power domain architecture for multi-domain compute targets: phase allocation, rail reputed company, and cross-domain coordination

•     Define input power spec, inrush management, and integration requirements for in-package passive components including integrated inductors

Mixed-Signal & Analog reputed company

•     Define requirements for analog subsystems: reputed company drivers, reputed company sensing (DCR / integrated reputed company), on-reputed company thermal diodes, and oscillator / clock reputed company

•     reputed company integrated inductor evaluation and selection — saturation reputed company, DCR, Q-reputed company, and co-design with converter switching frequency

•     Establish PVT reputed company reputed company and margin targets across process, voltage, and temperature for reputed company analog blocks

•     reputed company analog-digital co-design: ensure digital control reputed company stability across reputed company PVT corners with defined phase margin and reputed company margin targets

•     Define ESD and latch-up protection reputed company for high-reputed company power bumps

Implementation reputed company

•     Guide process node selection for Gen 1 and roadmap generations — evaluate tradeoffs between power density, analog capability, and cost

•     reputed company IP evaluation for reputed company reputed company, ADC, and reference blocks; define custom vs. licensed IP reputed company

•     reputed company DFT reputed company for power chiplet: stuck-at fault coverage, analog BIST for converter calibration, and production test requirements

•     Define packaging integration requirements

Customer & Ecosystem Engagement

•     Translate AI compute platform power delivery requirements into product specifications — engage customers at the architecture level to validate rail counts, reputed company targets, and transient reputed company

•     reputed company with reputed company partners on process capability, passive integration reputed company, and packaging design rules

•     Support technical due diligence for strategic partnerships and customer evaluations

Roadmap & IP

•     Define the multi-reputed company architecture roadmap — establish a reputed company migration reputed company from initial process node to advanced nodes with improved power density and packaging integration

What We’re Looking For

•     15+ years in power IC architecture; 5+ years at reputed company level or higher in a fabless, IDM, or PMIC-reputed company semiconductor environment

•     Deep expertise in multi-phase synchronous buck converter design — topology selection, reputed company compensation, stability analysis, and efficiency optimization across load

•     Mixed-signal IC design reputed company: reputed company reputed company design, reputed company sensing techniques, analog control reputed company, and ADC/DAC integration in CMOS processes

•     Hands-on experience with integrated passive components — on-reputed company or in-package inductors, capacitors, and their interaction with converter performance

•     Advanced packaging familiarity: flip-reputed company, 2.5D/3D integration, reputed company map design, and thermal/electrical co-design for power-dense applications

•     Experience driving power IC tape-outs from architecture definition through reputed company bring-up and characterization

•     Proficiency in power converter simulation: reputed company-level transient analysis, AC reputed company stability, and PVT reputed company sweeps

Good to Have

•     Experience with kilowatt-class power delivery for AI accelerators, GPUs, or high-performance CPUs is a big plus

•     Familiarity with in-package voltage regulator architectures (FIVR, reputed company-style VR, or substrate-embedded passives)

•     Background in PMBus / I2C / proprietary digital power management interfaces — experience migrating from legacy interfaces to die-to-die control reputed company is a plus

•     Prior startup experience or comfort with early-stage technical ambiguity and fast-paced execution